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NTP52N10 Power MOSFET 52 Amps, 100 Volts
N-Channel Enhancement Mode TO-220
Features
* Source-to-Drain Diode Recovery Time comparable to a Discrete * *
Fast Recovery Diode Avalanche Energy Specified IDSS and RDS(on) Specified at Elevated Temperature
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Typical Applications
* PWM Motor Controls * Power Supplies * Converters
MAXIMUM RATINGS (TC = 25C unless otherwise noted)
Rating Drain-to-Source Voltage Drain-to-Source Voltage (RGS = 1.0 M) Gate-to-Source Voltage - Continuous - Non-Repetitive (tpv10 ms) Drain - Continuous @ TA 25C - Continuous @ TA 100C - Pulsed (Note 1.) Total Power Dissipation @ TA 25C Derate above 25C Operating and Storage Temperature Range Single Drain-to-Source Avalanche Energy - Starting TJ = 25C (VDD = 50 V, VGS = 10 Vdc, IL(pk) = 40 A, L = 1.0 mH, RG = 25 ) Thermal Resistance - Junction-to-Case - Junction-to-Ambient Maximum Lead Temperature for Soldering Purposes, 1/8 from case for 10 seconds Symbol VDSS VDGR VGS VGSM ID ID IDM PD TJ, Tstg EAS Value 100 100 "20 "40 52 40 156 178 1.43 -55 to +150 800 Adc Unit Vdc Vdc Vdc
52 AMPERES 100 VOLTS 30 m @ VGS = 10 V
N-Channel D
G S
MARKING DIAGRAM & PIN ASSIGNMENT
4 Drain 4
Watts W/C C mJ
TO-220AB CASE 221A STYLE 5 1
NTP52N10 LLYWW 1 Gate 3 Source 2 Drain
C/W RJC RJA TL 0.7 62.5 260 C
2
3 NTP52N10 LL Y WW
1. Pulse Test: Pulse Width = 10 s, Duty Cycle = 2%.
= Device Code = Location Code = Year = Work Week
ORDERING INFORMATION
Device NTP52N10 Package TO-220AB Shipping 50 Units/Rail
(c) Semiconductor Components Industries, LLC, 2003
1
December, 2003 - Rev. 2
Publication Order Number: NTP52N10/D
NTP52N10
ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted)
Characteristic OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (VGS = 0 Vdc, ID = 250 Adc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VGS = 0 Vdc, VDS = 100 Vdc, TJ =25C) (VGS = 0 Vdc, VDS = 100 Vdc, TJ =125C) Gate-Body Leakage Current (VGS = 20 Vdc, VDS = 0 Vdc) ON CHARACTERISTICS Gate Threshold Voltage (VDS = VGS, ID = 250 Adc) Temperature Coefficient (Negative) Static Drain-to-Source On-State Resistance (VGS = 10 Vdc, ID = 26 Adc) (VGS = 10 Vdc, ID = 26 Adc, TJ = 125C) Drain-to-Source On-Voltage (VGS = 10 Vdc, ID = 52 Adc) Forward Transconductance (VDS = 26 Vdc, ID = 10 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS (Notes 2. & 3.) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Gate Charge (VDS = 80 Vdc, ID = 52 Adc, Vd Ad VGS = 10 Vdc) BODY-DRAIN DIODE RATINGS (Note 2.) Diode Forward On-Voltage Reverse Recovery Time (IS = 52 Adc, VGS = 0 Vdc, Ad Vd diS/dt = 100 A/s) Reverse Recovery Stored Charge 2. Indicates Pulse Test: P.W. = 300 s Max, Duty Cycle = 2%. 3. Switching characteristics are independent of operating junction temperature. (IS = 52 Adc, VGS = 0 Vdc) (IS = 52 Adc, VGS = 0 Vdc, TJ = 125C) VSD trr ta tb QRR - - - - - - 1.06 0.95 148 106 42 0.66 1.5 - - - - - C Vdc ns (VDD = 80 Vdc, ID = 52 Adc, VGS = 10 Vdc, RG = 9.1 ) td(on) tr td(off) tf Qtot Qgs Qgd - - - - - - - 15 95 74 100 72 13 37 25 180 150 190 135 - - nC ns (VDS = 25 Vdc, VGS = 0 Vdc, Vd Vd f = 1.0 MHz) Ciss Coss Crss - - - 2250 620 135 3150 860 265 pF VGS(th) 2.0 - RDS(on) - - VDS(on) - gFS - 1.25 31 1.45 - mhos 0.023 0.050 0.030 0.060 Vdc 2.92 -8.75 4.0 - Vdc mV/C V(BR)DSS 100 - IDSS - - IGSS - - - - 5.0 50 100 nAdc - 160 - - Vdc mV/C Adc Symbol Min Typ Max Unit
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NTP52N10
100 ID, DRAIN CURRENT (AMPS) 8V 80 7V VGS = 10 V 9V 6V 100 TJ = 25C ID, DRAIN CURRENT (AMPS) 80 VDS 10 V
60 5.5 V 40 4.5 V 4V 5V
60
40 TJ = 25C 20 TJ = 100C 0 2 3 4 TJ = -55C 5 6 7 8
20 0 0 1 2 3 4
5
6
7
8
9
10
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
RDS(on), DRAIN-TO-SOURCE RESISTANCE ()
0.05 VGS = 10 V 0.04 TJ = 100C 0.03
RDS(on), DRAIN-TO-SOURCE RESISTANCE ()
0.05 TJ = 25C
0.04
0.03 VGS = 10 V VGS = 15 V
0.02
TJ = 25C TJ = -55C
0.02
0.01 0 10 20 30 40
0.01 0 0 20 40 60 80 100 ID, DRAIN CURRENT (AMPS)
50
60
70
80
90
100
ID, DRAIN CURRENT (AMPS)
Figure 3. On-Resistance versus Drain Current and Temperature
RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 2.5 ID = 26 A VGS = 10 V IDSS, LEAKAGE (nA) 1000 10000
Figure 4. On-Resistance versus Drain Current and Gate Voltage
VGS = 0 V TJ = 150C
2
1.5
1
100
TJ = 100C
0.5 10 30
-60
-30
0
30
60
90
120
150
40
50
60
70
80
90
100
TJ, JUNCTION TEMPERATURE (C)
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 5. On-Resistance Variation with Temperature
Figure 6. Drain-To-Source Leakage Current versus Voltage
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NTP52N10
POWER MOSFET SWITCHING The capacitance (Ciss) is read from the capacitance curve at Switching behavior is most easily modeled and predicted by recognizing that the power MOSFET is charge a voltage corresponding to the off-state condition when controlled. The lengths of various switching intervals (t) calculating td(on) and is read at a voltage corresponding to the are determined by how fast the FET input capacitance can on-state when calculating td(off). be charged by current from the generator. At high switching speeds, parasitic circuit elements complicate the analysis. The inductance of the MOSFET The published capacitance data is difficult to use for source lead, inside the package and in the circuit wiring calculating rise and fall because drain-gate capacitance which is common to both the drain and gate current paths, varies greatly with applied voltage. Accordingly, gate produces a voltage at the source which reduces the gate drive charge data is used. In most cases, a satisfactory estimate of current. The voltage is determined by Ldi/dt, but since di/dt average input current (IG(AV)) can be made from a is a function of drain current, the mathematical solution is rudimentary analysis of the drive circuit so that complex. The MOSFET output capacitance also t = Q/IG(AV) complicates the mathematics. And finally, MOSFETs have finite internal gate resistance which effectively adds to the During the rise and fall time interval when switching a resistance of the driving source, but the internal resistance resistive load, VGS remains virtually constant at a level is difficult to measure and, consequently, is not specified. known as the plateau voltage, VSGP. Therefore, rise and fall The resistive switching time variation versus gate times may be approximated by the following: resistance (Figure 9) shows how typical switching tr = Q2 x RG/(VGG - VGSP) performance is affected by the parasitic circuit elements. If tf = Q2 x RG/VGSP the parasitics were not present, the slope of the curves would maintain a value of unity regardless of the switching speed. where The circuit used to obtain the data is constructed to minimize VGG = the gate drive voltage, which varies from zero to VGG common inductance in the drain and gate circuit loops and RG = the gate drive resistance is believed readily achievable with board mounted and Q2 and VGSP are read from the gate charge curve. components. Most power electronic loads are inductive; the data in the figure is taken with a resistive load, which During the turn-on and turn-off delay times, gate current is approximates an optimally snubbed inductive load. Power not constant. The simplest calculation uses appropriate MOSFETs may be safely operated into an inductive load; values from the capacitance curves in a standard equation for however, snubbing reduces switching losses. voltage change in an RC network. The equations are: td(on) = RG Ciss In [VGG/(VGG - VGSP)] td(off) = RG Ciss In (VGG/VGSP)
6000 VDS = 0 V 5000 C, CAPACITANCE (pF) 4000 3000 2000 1000 Crss 0 10 5 VGS 0 VDS 5 10 15 20 25 Coss Ciss VGS = 0 V TJ = 25C
Crss
Ciss
GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
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NTP52N10
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 20 18 16 14 12 10 8 6 4 2 0 0 10 VDS 20 30 40 50 QG, TOTAL GATE CHARGE (nC) ID = 52 A TJ = 25C 60 0 70 Q1 Q2 20 VGS 40 60 QT 100 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 1000 VDD = 80 V ID = 52 A VGS = 10 V 100 t, TIME (ns) td(off) tf tr td(on)
80
10
1 1 10 RG, GATE RESISTANCE (OHMS) 100
Figure 8. Gate-To-Source and Drain-To-Source Voltage versus Total Charge
Figure 9. Resistive Switching Time Variation versus Gate Resistance
DRAIN-TO-SOURCE DIODE CHARACTERISTICS
60 IS, SOURCE CURRENT (AMPS) 50 40 30 20 10 0 0.25 VGS = 0 V TJ = 25C
0.35 0.45 0.55 0.65 0.75 0.85 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
0.95
Figure 10. Diode Forward Voltage versus Current
SAFE OPERATING AREA reliable operation, the stored energy from circuit inductance The Forward Biased Safe Operating Area curves define dissipated in the transistor while in avalanche must be less the maximum simultaneous drain-to-source voltage and than the rated limit and adjusted for operating conditions drain current that a transistor can handle safely when it is differing from those specified. Although industry practice is forward biased. Curves are based upon maximum peak to rate in terms of energy, avalanche energy capability is not junction temperature and a case temperature (TC) of 25C. a constant. The energy rating decreases non-linearly with an Peak repetitive pulsed power limits are determined by using increase of peak current in avalanche and peak junction the thermal response data in conjunction with the procedures temperature. discussed in AN569, "Transient Thermal Although many E-FETs can withstand the stress of Resistance-General Data and Its Use." drain-to-source avalanche at currents up to rated pulsed Switching between the off-state and the on-state may current (IDM), the energy rating is specified at rated traverse any load line provided neither rated peak current (IDM) nor rated voltage (VDSS) is exceeded and the continuous current (ID), in accordance with industry custom. transition time (tr,tf) do not exceed 10 s. In addition the total The energy rating must be derated for temperature as shown power averaged over a complete switching cycle must not in the accompanying graph (Figure 12). Maximum energy at exceed (TJ(MAX) - TC)/(RJC). currents below rated continuous ID can safely be assumed to A Power MOSFET designated E-FET can be safely used equal the values indicated. in switching circuits with unclamped inductive loads. For
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NTP52N10
SAFE OPERATING AREA
1000 ID, DRAIN CURRENT (AMPS) VGS = 20 V SINGLE PULSE TC = 25C 800 700 600 500 400 300 200 100 0 25 150 50 75 100 125 TJ, STARTING JUNCTION TEMPERATURE (C) ID = 40 A
100
10 s 100 s
10
1 ms 10 ms dc RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 10 1 100 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 1000
1
0.1 0.1
Figure 11. Maximum Rated Forward Biased Safe Operating Area
r(t). EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED)
EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ)
Figure 12. Maximum Avalanche Energy versus Starting Junction Temperature
1.0 D = 0.5
0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE 0.01 0.00001 0.0001 0.001 t1 t2 DUTY CYCLE, D = t1/t2 0.01 t, TIME (s) 0.1 P(pk) RJC(t) = r(t) RJC D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TC = P(pk) RJC(t)
1.0
10
Figure 13. Thermal Response
di/dt IS trr ta tb TIME tp IS 0.25 IS
Figure 14. Diode Reverse Recovery Waveform
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NTP52N10
PACKAGE DIMENSIONS
TO-220 THREE-LEAD TO-220AB CASE 221A-09 ISSUE AA
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. DIM A B C D F G H J K L N Q R S T U V Z INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 --- --- 0.080 MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 --- --- 2.04
-T- B
4
SEATING PLANE
F T S
C
Q
123
A U K
H Z L V G D N R J
STYLE 5: PIN 1. GATE 2. DRAIN 3 SOURCE
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NTP52N10
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NTP52N10/D

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